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NCP500 150 mA CMOS Low Noise Low-Dropout Voltage Regulator
The NCP500 series of fixed output low dropout linear regulators are designed for portable battery powered applications which require low noise operation, fast enable response time, and low dropout. The device achieves its low noise performance without the need of an external noise bypass capacitor. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, and resistors for setting output voltage, and current limit and temperature limit protection circuits. The NCP500 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 1.0 mF. Standard voltage versions are 1.8, 2.5, 2.7, 2.8, 3.0, 3.3, and 5.0 V.
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TSOP-5 SN SUFFIX CASE 483 1
5
1 6
QFN 2x2 SQL SUFFIX CASE 488
* * * * * * * * * * *
Ultra-Low Dropout Voltage of 170 mV at 150 mA Fast Enable Turn-On Time of 20 msec Wide Operating Voltage Range of 1.8 V to 6.0 V Excellent Line and Load Regulation High Accuracy Output Voltage of 2.5% Enable Can Be Driven Directly by 1.0 V Logic Very Small QFN 2x2 Package Noise Sensitive Circuits - VCO's, RF Stages, etc. SMPS Post-Regulation Hand-Held Instrumentation Camcorders and Cameras
PIN CONNECTIONS AND MARKING DIAGRAMS
TSOP-5 Vin Gnd Enable 1 xxxYW 2 3 (Top View) 5 Vout
Typical Applications
4
N/C
QFN 2x2 Enable Gnd Vin 1 (3) Thermal Shutdown Driver w/ Current Limit Vout 5 (4) Vin 1 2 3 (Top View) xxx Y W M = Version = Year = Work Week = Date Code xxxM 6 5 4 N/C Gnd Vout
Enable ON 3 (1) OFF
Gnd
2 (2, 5)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 17 of this data sheet.
NOTE: Pin numbers in parenthesis indicate QFN package.
Figure 1. Simplified Block Diagram
(c) Semiconductor Components Industries, LLC, 2002
1
May, 2002 - Rev. 11
Publication Order Number: NCP500/D
NCP500
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PIN FUNCTION DESCRIPTION
TSOP-5 Pin No. 1 2 3 4 5 QFN 2x2 Pin No. 3 Pin Name Vin Description Positive power supply input voltage. Power supply ground. 2, 5 1 6 4 Gnd Enable N/C This input is used to place the device into low-power standby. When this input is pulled to a logic low, the device is disabled. If this function is not used, Enable should be connected to Vin. No internal connection. Vout Regulated output voltage.
MAXIMUM RATINGS
Rating
Symbol Vin
Value
Unit V V V -
Input Voltage
0 to 6.0
Enable Voltage Output Voltage
Von/off Vout -
-0.3 to Vin +0.3 -0.3 to Vin +0.3 Infinite 250 225
Output Short Circuit Duration
Thermal Resistance, Junction-to-Ambient TSOP-5 QFN (Note 3) Operating Junction Temperature Storage Temperature
RqJA
C/W
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TJ +125 Tstg -65 to +150 C 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL-STD-883, Method 3015 Machine Model Method 200 V Latch up capability (85C) "100 mA. 2. Device is internally limited to 160C by thermal shutdown. 3. For more information, refer to application note, AND8080/D.
C
ELECTRICAL CHARACTERISTICS (Vin = 2.3 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25C, for min and max values TA = -40C to 85C, Tjmax = 125C, unless otherwise noted)
Characteristic -1.8 V Output Voltage (TA = -40C to 85C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 2.3 V to 6.0 V, Iout = 1.0 mA) Load Regulation (Iout = 1.0 mA to 150 mA) Dropout Voltage (Measured at Vout -2.0%, TA = -40C to 85C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Output Short Circuit Current Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Bias Current Output Turn On Time (Enable Input = 0 V to Vin) Vout Regline Regload Vin-Vout - - - Iout(max) RR IQ - - - Vth(EN) 0.9 - IIB(EN) - - - - - 3.0 20 - 0.15 100 100 nA ms 0.01 175 175 1.0 300 300 V 200 - 2.0 140 270 540 62 10 200 350 700 - mA dB mA 1.755 - - 1.8 1.0 15 1.845 10 45 V mV mV mV Symbol Min Typ Max Unit
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2
NCP500
ELECTRICAL CHARACTERISTICS (Vin = 3.0 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25C, for min and max values TA = -40C to 85C, Tjmax = 125C, unless otherwise noted)
Characteristic -2.5 V Output Voltage (TA =-40C to 85C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 3.0 V to 6.0 V, Iout = 1.0 mA) Load Regulation (Iout = 1.0 mA to 150 mA) Dropout Voltage (Measured at Vout -2.0%, TA = -40C to 85C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Output Short Circuit Current Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Bias Current Output Turn On Time (Enable Input = 0 V to Vin) Vout 2.438 Regline Regload Vin-Vout - - - Iout(max) RR IQ - - - Vth(EN) 0.9 - IIB(EN) - - - - - 3.0 20 - 0.15 100 100 nA ms 0.01 180 180 1.0 300 300 V 200 - 2.0 100 190 540 62 10 170 270 700 - mA dB mA - - 2.5 1.0 15 2.563 10 45 mV mV mV V Symbol Min Typ Max Unit
ELECTRICAL CHARACTERISTICS (Vin = 3.2 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25C, for min and max values TA = -40C to 85C, Tjmax = 125C, unless otherwise noted)
Characteristic -2.7 V Output Voltage (TA =-40C to 85C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 3.2 V to 6.0 V, Iout = 1.0 mA) Load Regulation (Iout = 1.0 mA to 150 mA) Dropout Voltage (Measured at Vout -2.0%, TA = -40C to 85C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Output Short Circuit Current Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Bias Current Output Turn On Time (Enable Input = 0 V to Vin) Vout 2.633 Regline Regload Vin-Vout - - - Iout(max) RR IQ - - - Vth(EN) 0.9 - IIB(EN) - - - - - 3.0 20 - 0.15 100 100 nA ms 0.01 185 185 1.0 300 300 V 200 - 2.0 90 180 540 62 10 160 260 700 - mA dB mA - - 2.7 1.0 15 2.768 10 45 mV mV mV V Symbol Min Typ Max Unit
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NCP500
ELECTRICAL CHARACTERISTICS (Vin = 3.3 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25C, for min and max values TA = -40C to 85C, Tjmax = 125C, unless otherwise noted)
Characteristic -2.8 V Output Voltage (TA =-40C to 85C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 3.3 V to 6.0 V, Iout = 1.0 mA) Load Regulation (Iout = 1.0 mA to 150 mA) Dropout Voltage (Measured at Vout -2.0%, TA = -40C to 85C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Output Short Circuit Current Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Bias Current Output Turn On Time (Enable Input = 0 V to Vin) Vout 2.730 Regline Regload Vin-Vout - - - Iout(max) RR IQ - - - Vth(EN) 0.9 - IIB(EN) - - - - - 3.0 20 - 0.15 100 100 nA ms 0.01 185 185 1.0 300 300 V 200 - 2.0 90 170 540 62 10 150 250 700 - mA dB mA - - 2.8 1.0 15 2.870 10 45 mV mV mV V Symbol Min Typ Max Unit
ELECTRICAL CHARACTERISTICS (Vin = 3.5 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25C, for min and max values TA = -40C to 85C, Tjmax = 125C, unless otherwise noted)
Characteristic -3.0 V Output Voltage (TA =-40C to 85C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 3.5 V to 6.0 V, Iout = 1.0 mA) Load Regulation (Iout = 1.0 mA to 150 mA) Dropout Voltage (Measured at Vout -2.0%, TA = -40C to 85C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Output Short Circuit Current Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Bias Current Output Turn On Time (Enable Input = 0 V to Vin) Vout 2.925 Regline Regload Vin-Vout - - - Iout(max) RR IQ - - - Vth(EN) 0.9 - IIB(EN) - - - - - 3.0 20 - 0.15 100 100 nA ms 0.01 190 190 1.0 300 300 V 200 - 2.0 85 165 540 62 10 130 240 700 - mA dB mA - - 3.0 1.0 15 3.075 10 45 mV mV mV V Symbol Min Typ Max Unit
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NCP500
ELECTRICAL CHARACTERISTICS (Vin = 3.8 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25C, for min and max values TA = -40C to 85C, Tjmax = 125C, unless otherwise noted)
Characteristic -3.3 V Output Voltage (TA =-40C to 85C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 3.8 V to 6.0 V, Iout = 1.0 mA) Load Regulation (Iout = 1.0 mA to 150 mA) Dropout Voltage (Measured at Vout -2.0%, TA = -40C to 85C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Output Short Circuit Current Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Bias Current Output Turn On Time (Enable Input = 0 V to Vin) Vout 3.218 Regline Regload Vin-Vout - - - Iout(max) RR IQ - - - Vth(EN) 0.9 - IIB(EN) - - - - - 3.0 20 - 0.15 100 100 nA ms 0.01 195 195 1.0 300 300 V 200 - 2.0 80 150 540 62 10 110 230 700 - mA dB mA - - 3.3 1.0 15 3.383 10 45 mV mV mV V Symbol Min Typ Max Unit
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NCP500
ELECTRICAL CHARACTERISTICS (Vin = 5.5 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25C, for min and max values TA = -40C to 85C, Tjmax = 125C, unless otherwise noted)
Characteristic -5.0 V Output Voltage (TA =-40C to 85C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 5.5 V to 6.0 V, Iout = 1.0 mA) Load Regulation (Iout = 1.0 mA to 150 mA) Dropout Voltage (Measured at Vout -2.0%, TA = -40C to 85C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Output Short Circuit Current Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Enable Input Bias Current Output Turn On Time (Enable Input = 0 V to Vin) 4. Maximum package power dissipation limits must be observed. T *TA PD + J(max) RqJA 5. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. Vout 4.875 Regline Regload Vin-Vout - - - Iout(max) RR IQ - - - Vth(EN) 0.9 - IIB(EN) - - - - - 3.0 20 - 0.15 100 100 nA ms 0.01 210 210 1.0 300 300 V 200 - 2.0 60 120 540 62 10 100 180 700 - mA dB mA - - 5.0 1.0 15 5.125 10 45 mV mV mV V Symbol Min Typ Max Unit
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NCP500
70 Vin - Vout, Dropout Voltage (mV) 60 50 50 mA Load 40 30 20 10 0 -50 10 mA Load 1.0 mA Load -25 0 25 50 75 100 125 Vin - Vout, Dropout Voltage (mV) Vout(nom.) = 3.3 V 200 Vout(nom.) = 3.3 V 180 160 150 mA Load 140 120 mA Load 120 100 80 -50 100 mA Load
-25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
Figure 2. Dropout Voltage vs. Temperature
80 Vin - Vout, Dropout Voltage (mV) Vin - Vout, Dropout Voltage (mV) 70 60 50 40 30 20 10 0 -50 -25 0 25 10 mA Load 1.0 mA Load 50 75 100 125 50 mA Load Vout(nom.) = 2.8 V 200 180 220
Figure 3. Dropout Voltage vs. Temperature
Vout(nom.) = 2.8 V
150 mA Load 160 140 120 100 mA Load 100 80 -50
120 mA Load
-25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
Figure 4. Dropout Voltage vs. Temperature
Figure 5. Dropout Voltage vs. Temperature
120 Vin - Vout, Dropout Voltage (mV) 100 50 mA Load 80 60 40 10 mA Load 20 1.0 mA Load 0 -50 -25 0 25 50 75 100 125 Vin - Vout, Dropout Voltage (mV) Vout(nom.) = 1.8 V
350 330 310 290 270 250 230 210 190 170 150 -50 -25 0 25 100 mA Load 50 75 100 125 120 mA Load 150 mA Load Vout(nom.) = 1.8 V
Temperature (C)
Temperature (C)
Figure 6. Dropout Voltage vs. Temperature
Figure 7. Dropout Voltage vs. Temperature
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NCP500
3.284 3.282 Vout, Output Voltage (V) 3.28 3.278 3.276 3.274 3.272 3.27 3.268 -50 -25 0 25 50 75 100 125 Vin = Vout(nom.) +0.5 V Vout(nom.) = 3.3 V IO = 1.0 mA 3.284 3.282 Vout, Output Voltage (V) 3.28 3.278 3.276 3.274 3.272 3.268 -50 Vin = Vout(nom.) + 0.5 V Vout(nom.) = 2.8 V IO = 1.0 mA
-25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
Figure 8. Output Voltage vs. Temperature
Figure 9. Output Voltage vs. Temperature
1.804 1.8035 IQ, Quiescent Current (mA) Vout, Output Voltage (V) 1.803 1.8025 1.802 1.8015 1.801 1.8005 -50 -25 0 25 Vin = Vout(nom.) + 0.5 V Vout(nom.) = 1.8 V IO = 1.0 mA
210 200 190 180 170 160 150 -50 Vout(nom.) = 1.8 V Vin = Vout(nom.) = + 0.5 V IO = 0 mA Vout(nom.) = 3.3 V
50
75
100
125
-25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
Figure 10. Output Voltage vs. Temperature
Figure 11. Quiescent Current vs. Temperature
225 200 IQ, Quiescent Current (mA) IQ, Quiescent Current (mA) 175 150 125 100 75 50 25 0 0 1.0 2.0 3.0 Vout(nom.) = 1.8 V Iout = 0 mA TA = 25C 4.0 5.0 6.0
225 200 175 150 125 100 75 50 25 0 0 1.0 2.0 3.0 Vout(nom.) = 3.3 V Iout = 0 mA TA = 25C 4.0 5.0 6.0
Input Voltage (V)
Input Voltage (V)
Figure 12. Quiescent Current vs. Input Voltage
Figure 13. Quiescent Current vs. Input Voltage
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NCP500
225 200 Ground Pin Current (mA) 175 150 125 100 75 50 25 0 0 1.0 2.0 3.0 Vout(nom.) = 1.8 V Iout = 50 mA TA = 25C 4.0 5.0 6.0 Ground Pin Current (mA) 225 200 175 150 125 100 75 50 25 0 0 1.0 2.0 3.0 Vout(nom.) = 3.3 V Iout = 50 mA TA = 25C 4.0 5.0 6.0
Input Voltage (V)
Input Voltage (V)
Figure 14. Ground Pin Current vs. Input Voltage
Figure 15. Ground Pin Current vs. Input Voltage
600 500 Current Limit (mA) 400 300 200 100 0 0 Vout(nom.) = 3.3 V
100
RR, Ripple Rejection (dB)
80 60 mA 60
10 mA
40 Vout = 1.8 V Vin = 2.8 VDC + 0.5 Vp-p Cout = 1 mF 1.0 10
10 mA
20
1.0
2.0
3.0
4.0
5.0
6.0
0 0.1
100
Input Voltage (V)
f, Frequency (kHz)
Figure 16. Current Limit vs. Input Voltage
Vin, Input Voltage (V)
Figure 17. Ripple Rejection vs. Frequency
1000 Vin,Voltage Noise (nV/ HZ) Vout = 1.8 V Vin = 2.8 V Iout = 1 mA Cout = 1 mF
5.0 4.0 3.0 200 150 Vin = 3.8 V to 4.8 V Vout = 3.3 V Cout = 1.0 mF Iout = 1.0 mA
800
600
400 Output Voltage Deviation (mV) 0.1 1.0 10 100 1000 200
100 50 0 -50 0 20 40 60 80 Time (ms)
0 0.01
100
120
140
160
f, Frequency (kHz)
Figure 18. Output Noise Density
Figure 19. Line Transient Response
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NCP500
Vin, Input Voltage (V)
Iout, Output Current (mA)
5.0 4.0 3.0 200
225 150 75 0 200
Vin = 3.8 V Vout = 3.3 V Cout = 1.0 mF Cin = 1 mF
Output Voltage Deviation (mV)
150 100 50 0 -50 0 20 40 60 80 Time (ms)
Output Voltage Deviation (mV) 160
Vin = 3.8 V to 4.8 V Vout = 3.3 V Cout = 1.0 mF Iout = 10 mA
100 0 -100 -200 -300 0 10 20 30 Time (ms) 40 50 60
100
120
140
Figure 20. Line Transient Response
Enable Voltage (V)
Figure 21. Load Transient Response
225 Iout, Output Current (mA) 150 75 0 50 25 0 -25 -50 0 10 20 30 40 50 60 70 80 90 Time (ms) Vin = 3.8 V Vout = 3.3 V Cout = 10 mF Cin = 1 mF
3.0 2.0 1.0 0 4.0 Vin = 3.8 V Vout = 3.3 V TA = 25C RL = 3.3 kW Cin = 1 mF
Output Voltage (V)
Output Voltage Deviation (mV)
3.0 2.0 1.0 0 0 20 40 Cout = 10 mF Cout = 1.0 mF 60 Time (ms) 80 100 120
Figure 22. Load Transient Response
Figure 23. Turn-off Response
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NCP500
2 1.8 Vout, Output Voltage (V) Vout, Output Voltage (V) 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 1 2 3 Cin = 1 mF Cout = 1 mF TA = 25C VEnable = Vin 4 5 6 2.5 2 1.5 1 0.5 0 0 1 2 3 4 5 6 Vin, Input Voltage (V) Vin, Input Voltage (V) Cin = 1 mF Cout = 1 mF TA = 25C VEnable = Vin 3
Figure 24. Output Voltage vs. Input Voltage
3.5 3 Vout, Output Voltage (V) 2.5 2 1.5 1 0.5 0
Figure 25. Output Voltage vs. Input Voltage
Cin = 1 mF Cout = 1 mF TA = 25C VEnable = Vin 0 1 2 3 4 5 6 7
Vin, Input Voltage (V)
Figure 26. Output Voltage vs. Input Voltage
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NCP500
DEFINITIONS
Load Regulation Line Regulation
The change in output voltage for a change in output load current at a constant temperature.
Dropout Voltage
The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 2% below its nominal. The junction temperature, load current, and minimum input supply requirements affect the dropout level.
Output Noise Voltage
The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected.
Line Transient Response
Typical over and undershoot response when input voltage is excited with a given slope.
Thermal Protection
This is the integrated value of the output noise over a specified frequency range. Input voltage and output load current are kept constant during the measurement. Results are expressed in mVRMS or nV Hz.
Quiescent Current
Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160C, the regulator turns off. This feature is provided to prevent failures from accidental overheating.
Maximum Package Power Dissipation
The current which flows through the ground pin when the regulator operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current.
The power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125C.
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NCP500
APPLICATIONS INFORMATION The NCP500 series regulators are protected with internal thermal shutdown and internal current limit. A typical application circuit is shown in Figure 27.
Input Decoupling (C1)
If TJ is not recommended to exceed 125C, then the NCP500 can dissipate up to 400 mW @ 25C. The power dissipated by the NCP500 can be calculated from the following equation:
Ptot + [Vin * Ignd (Iout)] ) [Vin * Vout] * Iout
A 1.0 mF capacitor either ceramic or tantalum is recommended and should be connected close to the NCP500 package. Higher values and lower ESR will improve the overall line transient response.
Output Decoupling (C2)
or
P ) Vout * Iout VinMAX + tot Ignd ) Iout
The NCP500 is a stable component and does not require a minimum Equivalent Series Resistance (ESR) or a minimum output current. The minimum decoupling value is 1.0 mF and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response. Figure 29 shows the stability region for a range of operating conditions and ESR values.
Noise Decoupling
If a 150 mA output current is needed the ground current is extracted from the data sheet curves: 200 mA @ 150 mA. For a NCP500SN18T1 (1.8 V), the maximum input voltage will then be 4.4 V, good for a 1 Cell Li-ion battery.
Hints
Please be sure the Vin and Gnd lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible.
Package Placement
The NCP500 is a low noise regulator without the need of an external bypass capacitor. It typically reaches a noise level of 50 mVRMS overall noise between 10 Hz and 100 kHz. The classical bypass capacitor impacts the start up phase of standard LDOs. However, thanks to its low noise architecture, the NCP500 operates without a bypass element and thus offers a typical 20 ms start up phase.
Enable Operation
The enable pin will turn on or off the regulator. These limits of threshold are covered in the electrical specification section of this data sheet. The turn-on/turn-off transient voltage being supplied to the enable pin should exceed a slew rate of 10 mV/ms to ensure correct operation. If the enable is not to be used then the pin should be connected to Vin.
Thermal
QFN packages can be placed using standard pick and place equipment with an accuracy of "0.05 mm. Component pick and place systems are composed of a vision system that recognizes and positions the component and a mechanical system which physically performs the pick and place operation. Two commonly used types of vision systems are: (1) a vision system that locates a package silhouette and (2) a vision system that locates individual bumps on the interconnect pattern. The latter type renders more accurate place but tends to be more expensive and time consuming. Both methods are acceptable since the parts align due to a self-centering feature of the QFN solder joint during solder re-flow.
Solder Paste
Type 3 or Type 4 solder paste is acceptable.
Re-flow and Cleaning
As power across the NCP500 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature effect the rate of junction temperature rise for the part. This is stating that when the NCP500 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications. The maximum dissipation the package can handle is given by:
T *TA PD + J(max) RqJA
The QFN may be assembled using standard IR/IR convection SMT re-flow processes without any special considerations. As with other packages, the thermal profile for specific board locations must be determined. Nitrogen purge is recommended during solder for no-clean fluxes. The QFN is qualified for up to three re-flow cycles at 235C peak (J-STD-020). The actual temperature of the QFN is a function of: * Component density * Component location on the board * Size of surrounding components
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NCP500
ON OFF Battery or Unregulated Voltage Vout C1 + 1 2 ON OFF 3 4 5 + C2 Battery or Unregulated Voltage 2 3 + C1 5 Vout 4 + C2 1 6
Figure 27. Typical Application Circuit
Figure 28. Typical Application Circuit
10 UNSTABLE Output Capacitor ESR (W) Cout = 1 mF to 10 mF TA = 40C to 125C Vin = up to 6.0 V
1
STABLE 0.1
0.01
0
25
50
75
100
125
150
IO, Output Current (mA)
Figure 29. Stability
Input R
Q1
Input Q2
R1 R2 R3
Q1
Output 1 1.0 mF 2 3 4 5 1.0 mF
Output 1 5 1.0 mF 4
1.0 mF
2 3
Figure 30. Current Boost Regulator
Figure 31. Current Boost Regulator with Short Circuit Limit
Short circuit current limit is essentially set by the VBE of Q2 and R1. ISC = ((VBEQ2 - ib * R2) / R1) + IO(max) Regulator
The NCP500 series can be current boosted with a PNP transistor. Resistor R in conjunction with VBE of the PNP determines when the pass transistor begins conducting; this circuit is not short circuit proof. Input/Output differential voltage minimum is increased by VBE of the pass resistor.
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NCP500
Enable Voltage (V) 4 3 2 1 0 3 2.5 2 1.5 1 0.5 0 0 10 20 30 40 50 60 70 80 90 100 110 R = 1.0 MW C = 0.1 mF No Delay R = 1.0 MW C = 1.0 mF TA = 25C Vin = 3.4 V Vout = 2.8 V
Input 1 1.0 mF 2 Enable 3 4 5
Output 1.0 mF
Output 1 1.0 mF 2 3 R C 4 5 1.0 mF
Vout, Output Voltage (V)
Time (ms)
Figure 32. Delayed Turn-on
If a delayed turn-on is needed during power up of several voltages then the above schematic can be used. Resistor R, and capacitor C, will delay the turn-on of the bottom regulator. A few values were chosen and the resulting delay can be seen in Figure 33.
Figure 33. Delayed Turn-on
The graph shows the delay between the enable signal and output turn-on for various resistor and capacitor values.
Input R
Q1 1.0 mF 5.6 V
Output 1 2 3 4 5 1.0 mF
Figure 34. Input Voltages Greater than 6.0 V
A regulated output can be achieved with input voltages that exceed the 6.0 V maximum rating of the NCP500 series with the addition of a simple pre-regulator circuit. Care must be taken to prevent Q1 from overheating when the regulated output (Vout) is shorted to Gnd.
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NCP500
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.094 2.4
0.037 0.95 0.074 1.9 0.037 0.95 0.028 0.7 0.039 1.0 inches mm
TSOP-5
(Footprint Compatible with SOT23-5)
0.5 mm (min)
0.4 mm (min)
1.9 mm
QFN 2x2
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0.65 mm
0.65 mm
NCP500
ORDERING INFORMATION
Device NCP500SN18T1 NCP500SN25T1 NCP500SN27T1 NCP500SN28T1 NCP500SN30T1 NCP500SN33T1 NCP500SN50T1 NCP500SQL18T1 NCP500SQL25T1 NCP500SQL27T1 NCP500SQL28T1 NCP500SQL30T1 NCP500SQL33T1 NCP500SQL50T1 Nominal Output Voltage 1.8 2.5 2.7 2.8 3.0 3.3 5.0 1.8 2.5 2.7 2.8 3.0 3.3 5.0 Marking LCS LCT LCU LCV LCW LCX LCY LED LEE LEF LEG LEH LEJ LEK Package TSOP-5 Shipping 3000 Units/ 7 Tape & Reel
QFN 2x2
3000 Units/ 7 Tape & Reel
For availability of other output voltages, please contact your local ON Semiconductor Sales Representative.
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NCP500
PACKAGE DIMENSIONS
TSOP-5 SN SUFFIX PLASTIC PACKAGE CASE 483-01 ISSUE B
D
5 1 2 4 3
S
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181
L G A J C 0.05 (0.002) H K M
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NCP500
PACKAGE DIMENSIONS
QFN 2x2 SQL SUFFIX PLASTIC PACKAGE CASE 488-02 ISSUE B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. 488-01 OBSOLETE. NEW STANDARD IS 488-02. DIM A B C D G H J L S MILLIMETERS MIN MAX 2.18 2.23 1.98 2.03 0.88 0.93 0.23 0.28 0.650 BSC 0.35 0.40 0.05 0.10 1.28 1.33 0.33 0.38 INCHES MIN MAX 0.086 0.088 0.078 0.080 0.035 0.037 0.009 0.011 0.026 BSC 0.014 0.016 0.002 0.004 0.050 0.052 0.013 0.015
TOP VIEW
PIN 1
A J H G
C S
D
L
B
U BOTTOM VIEW
SIDE VIEW
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NCP500
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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NCP500/D

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